| 集电极-基极反向击穿电压V(BR)CBO Collector-Base Voltage(VCBO) | 50V/-50V |
| 集电极-发射极反向击穿电压V(BR)CEO Collector-Emitter Voltage(VCEO) | 50V/-50V |
| 集电极连续输出电流IC Collector Current(IC) | 100mA/-100mA |
| Q1基极输入电阻R1 Input Resistance(R1) | 10KΩ/Ohm |
| Q1基极-发射极输入电阻R2 Base-Emitter Resistance(R2) | 47KΩ/Ohm |
| Q1电阻比(R1/R2) Q1 Resistance Ratio | 0.21 |
| Q2基极输入电阻R1 Input Resistance(R1) | 10KΩ/Ohm |
| Q2基极-发射极输入电阻R2 Base-Emitter Resistance(R2) | 47KΩ/Ohm |
| Q2电阻比(R1/R2) Q2 Resistance Ratio | 0.21 |
| 直流电流增益hFE DC Current Gain(hFE) | 80 |
| 截止频率fT Transtion Frequency(fT) | 150MHz/80MHz |
| 耗散功率Pc Power Dissipation | 300mW/0.3W |
| Description & Applications | Features • Silicon NPN epitaxial planer transistor (Tr1) Silicon PNP epitaxial planer transistor (Tr2) • Two elements incorporated into one package.(Emitter-coupled transistors with built-in resistor) • Reduction of the mounting area and assembly cost by one half. • For switching/digital circuits |
| 描述与应用 | 特点 •NPN硅外延的刨床晶体管（TR1）硅PNP外延刨床晶体管的（TR2） •两个要素纳入一包装（发射极耦合晶体管内置电阻）。 •减少安装面积和汇编一半的费用。 •对于开关/数字电路 |