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  • Model:TC7SP332WBG
  • Manufacturer:HUABAN
  • Date Code:12+ROHS
  • Standard Package:3000
  • Min Order:10
  • Mark/silk print/code/type:k
  • Package:WCSP6

逻辑类型
Logic Type
变换器 Translator
电路数
Number of Circuits
输入数
Number of Inputs
电源电压Vcc
Voltage - Supply
静态电流Iq
Current - Quiescent (Max)
输出高,低电平电流
Current - Output High, Low
低逻辑电平
Logic Level - Low
高逻辑电平
Logic Level - High
传播延迟时间@Vcc,CL
Max Propagation Delay @ V, Max CL
1.0ns
Description & Applications3 V ~ 3.6 V
描述与应用TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic Dual supply 2-Input OR Gate with Level Translator The TC7SP332 is a dual supply, advanced high-speed CMOS 2-input dual supply voltage interface OR gate fabricated with silicon gate CMOS technology. It is also designed with over voltage tolerant inputs and outputs up to 3.6 V. Designed for use as an interface between a 1.2-V, 1.5-V, 1.8-V, or 2.5-V bus and a 1.8-V, 2.5-V or 3.3-V bus in mixed 1.2-V, 1.5-V, 1.8-V or 2.5-V/1.8-V, 2.5-V or 3.3-V supply systems. All inputs are equipped with protection circuits against static discharge. Features • Level converter for interfacing 1.2-V to 1.8-V, 1.2-V to 2.5-V, 1.2-V to 3.3-V, 1.5-V to 2.5-V, 1.5-V to 3.3-V, 1.8-V to 2.5-V, 1.8-V to 3.3-V or 2.5 V to 3.3-V system. • High-speed operation : tpd = 6.8 ns (max) (VCCA = 2.5 ± 0.2 V, VCCB = 3.3 ± 0.3 V) pd = 7.8 ns (max) (VCCA = 1.8 ± 0.15 V, VCCB = 3.3 ± 0.3 V) tpd = 9.0 ns (max) (VCCA = 1.5 ± 0.1 V, VCCB = 3.3 ± 0.3 V) tpd = 31 ns (max) (VCCA = 1.2 ± 0.1 V, VCCB = 3.3 ± 0.3 V) tpd = 9.5 ns (max) (VCCA = 1.8 ± 0.15 V, VCCB = 2.5 ± 0.2 V) pd = 10.5 ns (max) (VCCA = 1.5 ± 0.1 V, VCCB = 2.5 ± 0.2 V) pd = 32 ns (max) (VCCA = 1.2 ± 0.1 V, VCCB = 2.5 ± 0.2 V) tpd = 37 ns (max) (VCCA = 1.2 ± 0.1 V, VCCB = 1.8 ± 0.15 V) • Output current : IOH/IOL = ±12 mA (min) (VCC = 3.0 V) IOH/IOL = ±9mA (min) (VCC = 2.3 V) IOH/IOL = ±3 mA (min) (VCC = 1.65 V) • Latch-up performance: -300 mA • ESD performance: Machine model ≥ ±200 V Human body model ≥ ±2000 V • Ultra-small package: WCSP6 • Power-down protection is provided on all inputs and outputs

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