集电极-基极反向击穿电压V(BR)CBO Collector-Base Voltage(VCBO) |
50V |
集电极-发射极反向击穿电压V(BR)CEO Collector-Emitter Voltage(VCEO) |
50V |
集电极连续输出电流IC Collector Current(IC) |
50mA |
Q1基极输入电阻R1 Input Resistance(R1) |
10KΩ/Ohm |
Q1基极-发射极输入电阻R2 Base-Emitter Resistance(R2) |
10KΩ/Ohm |
Q1电阻比(R1/R2) Q1 Resistance Ratio |
1 |
Q2基极输入电阻R1 Input Resistance(R1) |
10KΩ/Ohm |
Q2基极-发射极输入电阻R2 Base-Emitter Resistance(R2) |
10KΩ/Ohm |
Q2电阻比(R1/R2) Q2 Resistance Ratio |
1 |
直流电流增益hFE DC Current Gain(hFE) |
|
截止频率fT Transtion Frequency(fT) |
250MHz |
耗散功率Pc Power Dissipation |
150mW/0.15W |
Description & Applications |
Features •NPN 100mA 50V Complex Digital Transistors (Bias Resistor Built-in Transistors) •Built-In Biasing Resistors, R1= R2= 10kW. •Two DTC114E chips in one package. •Built-in bias resistors enable the configuration of an inverter circuit without connecting external input resistors (see inner circuit). •The bias resistors consist of thin-film resistors with complete isolation to allow negative biasing lInner circuit of the input. They also have the advantage of completely eliminating parasitic effects. •Only the on/off conditions need to be set for operation, making the circuit design easy. •Lead Free/RoHS Compliant. |
描述与应用 |
特点 •NPN100毫安50V复杂的数字晶体管(内置偏置电阻晶体管) •内置偏置电阻R1= R2=10KW。 •两个DTC114E芯片在一个封装中。 •内置启用偏置电阻器的逆变器电路的配置,而无需连接外部输入电阻(见内部电路)。 •偏置电阻组成的薄膜电阻完全隔离,允许负偏置内衬电路输入的。它们还具有的优点是完全消除了寄生效应。 •只有开/关条件需要设置操作,使得电路的设计容易。 •无铅/ RoHS标准。 |