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Integrated Circuit（IC） NAND gate SN74LVC2G00DCUR VFSOP8/US8 marking C00
| 逻辑类型 Logic Type | 与非门 NAND Gate |
| 电路数 Number of Circuits | 2 |
| 输入数 Number of Inputs | 2 |
| 电源电压Vcc Voltage - Supply | 1.65V~5.5V |
| 静态电流Iq Current - Quiescent (Max) | 10uA |
| 输出高，低电平电流 Current - Output High, Low | -32mA，32mA |
| 低逻辑电平 Logic Level - Low | 0.1V~0.55V |
| 高逻辑电平 Logic Level - High | 1.2V~3.8V |
| 传播延迟时间@Vcc，CL Max Propagation Delay @ V, Max CL | |
| Description & Applications | Features DUAL 2-INPUT POSITIVE-NAND GATE Available in the Texas Instruments NanoFree™ Package >2 V at VCC Typical VOHV(Output VOH Undershoot)= 3.3 V, TA= 25°C Supports 5-V VCC Operation Ioff Supports Partial-Power-Down Mode Inputs Accept Voltages to 5.5 V Operation Latch-Up Performance Exceeds 100 mA Per Max tpd of 4.3 ns at 3.3 V JESD 78, Class II Low Power Consumption, 10-µA Max ICC ESD Protection Exceeds JESD 22 ±24-mA Output Drive at 3.3 V– 2000-V Human-Body Model (A114-A) Typical VOLP(Output Ground Bounce)<0.8 V at V – 1000-V Charged-Device Model (C101)CC= 3.3 V, TA= 25°C |
| 描述与应用 | 特性 双2输入正与非门 可在德州仪器NanoFree™封装>2 V在VCC ：典型的VOHV（输出VOH冲的）=3.3 V，TA= 25°C 支持5-V VCC运作 IOFF支持部分掉电模式 接受输入电压5.5 V运作 闭锁性能超过100 mA每 在3.3 V JESD 78，II级，最大吨为4.3 ns 低功耗，10μA最大ICC ESD保护超过JESD22 ±24 mA输出驱动在3.3 V-2000-V人体模型（A114-A） 典型的VoIP（输出地弹跳）<0.8 V，V - 1000-V带电器件模型（C101）CC = 3.3 V，TA= 25°C |
