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Integrated Circuit（IC） NAND gate SN74LVC2G00YEAR 8-DSBGA/8-WCSP marking
| 逻辑类型 Logic Type | 与非门 NAND Gate |
| 电路数 Number of Circuits | 1 |
| 输入数 Number of Inputs | 1 |
| 电源电压Vcc Voltage - Supply | 1.65V~5.5V |
| 静态电流Iq Current - Quiescent (Max) | 10µA |
| 输出高，低电平电流 Current - Output High, Low | -32mA,32mA |
| 低逻辑电平 Logic Level - Low | |
| 高逻辑电平 Logic Level - High | |
| 传播延迟时间@Vcc，CL Max Propagation Delay @ V, Max CL | 3ns @ 5V，50pF |
| Description & Applications | DUAL 2-INPUT POSITIVE-NAND GATE ；Available in the Texas Instruments • Typical VOHV (Output VOH Undershoot) NanoFree™ Package >2 V at VCC = 3.3 V, TA = 25°C • Supports 5-V VCC Operation • Ioff Supports Partial-Power-Down Mode • Inputs Accept Voltages to 5.5 V Operation • Latch-Up Performance Exceeds 100 mA Per • Max tpd of 4.3 ns at 3.3 V JESD 78, Class II • Low Power Consumption, 10-µA Max ICC • ESD Protection Exceeds JESD 22 • ±24-mA Output Drive at 3.3 V – 2000-V Human-Body Model (A114-A) • Typical VOLP (Output Ground Bounce) <0.8 V at V – 1000-V Charged-Device Model (C101)VCC= 3.3 V, TA= 25°C |
| 描述与应用 | 双路2输入正与非门;德州仪器•典型VOHV （输出VOH冲） NanoFree™封装>2 V在VCC =3.3 V，TA = 25°C •支持5-V VCC操作 •IOFF支持部分掉电模式 •输入接受5.5 V操作电压 •闭锁性能超过100 mA每 •最大TPD为4.3 ns在3.3 V JESD 78，II类 •低功耗，10μA最大ICC •ESD保护超过JESD22 •±24 mA输出驱动在3.3 V - 2000-V人体模型（A114-A） •典型的VoIP （输出地弹跳） 在V<0.8 V - 1000-V带电器件模型（C101）VCC = 3.3 V，TA= 25°C |
