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NSBC114EDXV6T5 NPN+NPN Complex Bipolar Digital Transistor 50V 100mA HEF=35~60 R1=R2=10KΩ 500mW/0.5W SOT-563 marking 7AU switching inverting interface driver circuit
| 集电极-基极反向击穿电压V(BR)CBO Collector-Base Voltage(VCBO) | 50V |
| 集电极-发射极反向击穿电压V(BR)CEO Collector-Emitter Voltage(VCEO) | 50V |
| 集电极连续输出电流IC Collector Current(IC) | 100mA |
| Q1基极输入电阻R1 Input Resistance(R1) | 10KΩ/Ohm |
| Q1基极-发射极输入电阻R2 Base-Emitter Resistance(R2) | 10KΩ/Ohm |
| Q1电阻比(R1/R2) Q1 Resistance Ratio | 1 |
| Q2基极输入电阻R1 Input Resistance(R1) | 10KΩ/Ohm |
| Q2基极-发射极输入电阻R2 Base-Emitter Resistance(R2) | 10KΩ/Ohm |
| Q2电阻比(R1/R2) Q2 Resistance Ratio | 1 |
| 直流电流增益hFE DC Current Gain(hFE) | 35~60 |
| 截止频率fT Transtion Frequency(fT) | |
| 耗散功率Pc Power Dissipation | 500mW/0.5W |
| Description & Applications | Features •Dual Bias Resistor Transistors •NPN Silicon Surface Mount Transistors with Monolithic Bias Resistor Network •Simplifies Circuit Design •Reduces Board Space •Reduces Component Count •Lead−Free Solder Plating |
| 描述与应用 | 特点 •双偏置电阻晶体管 •NPN硅表面贴装晶体管与单片偏置电阻网络 •简化电路设计 •缩小板级空间 •减少元件数量 •无铅焊料电镀 |
