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TC7SP3125TU Integrated Circuit (IC) Logic Devices-Converters, Level Shifters IC TRNSLTR UNIDIRECTIONAL UF6
| 逻辑类型 Logic Type |
总线缓冲器 Bus Buffer |
| 电路数 Number of Circuits |
|
| 输入数 Number of Inputs |
|
| 电源电压Vcc Voltage - Supply |
|
| 静态电流Iq Current - Quiescent (Max) |
双电源 Dual Supply |
| 输出高，低电平电流 Current - Output High, Low |
1.1 V ~ 2.7 V 1.65 V ~ 3.6 V |
| 低逻辑电平 Logic Level - Low |
The TC7SP3125 is an advanced high-speed CMOS 1-bit dual supply voltage interface bus buffer fabricated with silicon gate CMOS technology. It is also designed with over voltage tolerant inputs and outputs up to 3.6 V. Designed for use as an interface between a 1.2-V, 1.5-V, 1.8-V, or 2.5-V bus and a 1.8-V, 2.5-V or 3.3-V bus in mixed 1.2-V, 1.5-V, 1.8-V or 2.5-V/1.8-V, 2.5-V or 3.3-V supply systems. The A-input interfaces with the 1.2-V, 1.5-V, 1.8-V or 2.5-V bus, the B-output with the 1.8-V, 2.5-V, 3.3-V bus. The enable input ( OE ) can be used to disable the device so that the signal lines are effectively isolated. All inputs are equipped with protection circuits against static discharge or transient excess voltage. Level converter for interfacing 1.2-V to 1.8-V, 1.2-V to 2.5-V, 1.2-V to 3.3-V, 1.5-V to 2.5-V, 1.5-V to 3.3-V, 1.8-V to 2.5-V, 1.8-V to 3.3-V or 2.5-V to 3.3-V system. High-speed operation : tpd = 6.8 ns (max) (VCCA = 2.5 ± 0.2 V, VCCB = 3.3 ± 0.3 V) Output current : IOHB / IOLB = ±12 mA (min) (VCCB = 3.0 V) Latch-up performance: -300 mA ESD performance: Machine model ≥ ±200 V Human body model ≥ ±2000 V Ultra-small package: UF6, WCSP6 Low current consumption : Using the new circuit significantly reduces current consumption when OE = “H”. Suitable for battery-driven applications such as PDAs and cellular phones. Floating A-bus is permitted. (when OE = “H”) 3.6-V tolerant function and power-down protection provided on all inputs and outputs. |
| 高逻辑电平 Logic Level - High |
TC7SP3125是一种先进的高速CMOS1位双电源电压接口总线缓冲器，利用硅栅CMOS技术制作。过电压耐受输入和输出为3.6 V。设计用于1.2V，1.5 V，1.8 V，或2.5V总线和1.8V，2.5 V或3.3V总线之间的接口。A输入接口同1.2 V，1.5 V，1.8 V或2.5 V总线，B-输出，1.8 V，2.5 V，3.3 V总线。使能输入信号（OE）可用于禁用该设备，使该信号线有效地隔离。所有输入都配备了放电保护电路防静电或瞬态过电压。 高速运行：TPD =6.8NS（最大）（VCCA=2.5±0.2 V，VCCB=3.3±0.3 V） 输出电流：IOHB/ IOLB=±12 mA（分钟）（VCCB=3.0 V） 闭锁性能：-300mA ESD性能：机器型号≥±200 V 人体模式≥±2000 V 超小封装：六氟化铀，WCSP6 低电流消耗：使用新的电路，显着减少电流消耗，当OE=“H”。 适用于电池驱动的应用程序，如PDA和蜂窝电话。 浮动总线是允许的。 （当OE=“H”） 3.6V容错功能和断电保护提供所有输入和输出。 |
| 传播延迟时间@Vcc，CL Max Propagation Delay @ V, Max CL |
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| Description & Applications | |
| 描述与应用 |
