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逻辑类型 Logic Type | 反相器 Inverter |
电路数 Number of Circuits | 1 |
输入数 Number of Inputs | 1 |
电源电压Vcc Voltage - Supply | 3V~5.5V |
静态电流Iq Current - Quiescent (Max) | 1uA |
输出高,低电平电流 Current - Output High, Low | -8mA,8mA |
低逻辑电平 Logic Level - Low | 0.53V~0.8V |
高逻辑电平 Logic Level - High | 1.4V~2V |
传播延迟时间@Vcc,CL Max Propagation Delay @ V, Max CL | 7.7ns @ 4.5V~5.5V,50pF |
Description & Applications | Inverting Buffer / CMOS Logic Level Shifter ;Features High Speed: tPD = 3.8 ns (Typ) at VCC = 5.0 V Low Power Dissipation: ICC = 1 uA (Max) @TA = 25°C TTL−Compatible Inputs: VIL = 0.8 V; VIH = 2.0 V CMOS−Compatible Outputs: VOH > 0.8 VCC; VOL < 0.1 VCC @ Load Power Down Protection Provided on Inputs and Outputs Balanced Propagation Delays Pin and Function Compatible with Other Standard Logic Families Chip Complexity: FETs = 105; Equivalent Gates = 26 Pb−Free Package is Available |
描述与应用 | 反相缓冲器/ CMOS逻辑电平转换器;特性 高速:TPD =3.8 ns(典型值),VCC= 5.0 V 低功耗:ICC=1uA(最大值)@ TA= 25°C TTL兼容的输入:VIL=0.8 V; VIH=2.0 V CMOS兼容输出:VOH> 0.8 VCC VOL<0.1 VCC@负载 掉电保护提供输入和输出 平衡传输延时 引脚和功能兼容与其他标准逻辑系列 芯片复杂度:场效应管=105;等效门= 26 无铅包装可用 |