| 集电极-基极反向击穿电压V(BR)CBO Collector-Base Voltage(VCBO) | 12V |
| 集电极-发射极反向击穿电压V(BR)CEO Collector-Emitter Voltage(VCEO) | 50V |
| 集电极连续输出电流IC Collector Current(IC) | 100mA |
| Q1基极输入电阻R1 Input Resistance(R1) | 2.2KΩ/Ohm |
| Q1基极-发射极输入电阻R2 Base-Emitter Resistance(R2) | 47KΩ/Ohm |
| Q1电阻比(R1/R2) Q1 Resistance Ratio | 0.047 |
| Q2基极输入电阻R1 Input Resistance(R1) | 2.2KΩ/Ohm |
| Q2基极-发射极输入电阻R2 Base-Emitter Resistance(R2) | 47KΩ/Ohm |
| Q2电阻比(R1/R2) Q2 Resistance Ratio | 0.047 |
| 直流电流增益hFE DC Current Gain(hFE) | |
| 截止频率fT Transtion Frequency(fT) | 250MHz |
| 耗散功率Pc Power Dissipation | 150mW/0.15W |
| Description & Applications | Features •General purpose (dual digital transistors) •Two DTC123J chips in a EMT or UMT or SMT package. •Mounting possible with EMT3 or UMT3 or SMT3 automatic mounting machines. •Transistor elements are independent, eliminating interference. •Mounting cost and area can be cut in half. |
| 描述与应用 | 特点 •通用（双数字晶体管） •的两个DTC123J芯片在EMT或UMT或SMT封装。 •安装可能与EMT3或UMT3或SMT3自动安装机器。 •晶体管元素是独立的，消除干扰。 •安装成本和面积可减少一半 |