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Integrated Circuit（IC） NAND gate 74LVC38APW TSSOP14 marking LVC38A
| 逻辑类型 Logic Type | 与非门 NAND Gate |
| 电路数 Number of Circuits | 4 |
| 输入数 Number of Inputs | 2 |
| 电源电压Vcc Voltage - Supply | 1.2V~5.5V |
| 静态电流Iq Current - Quiescent (Max) | 40uA |
| 输出高，低电平电流 Current - Output High, Low | -32mA，32mA |
| 低逻辑电平 Logic Level - Low | 0.7V~0.8V |
| 高逻辑电平 Logic Level - High | 1.7V~2V |
| 传播延迟时间@Vcc，CL Max Propagation Delay @ V, Max CL | 2.3ns @ 3.3V，50pF |
| Description & Applications | Quad 2-input NAND gate; open-drain;FEATURES 5 V tolerant inputs for interfacing with 5 V logic Wide supply voltage range from 1.2 V to 5.5 V CMOS low power consumption Direct interface with TTL levels Open-drain outputs Complies with JEDEC standard: JESD8-7A (1.65 V to 1.95 V JESD8-5A (2.3 V to 2.7 V JESD8-C/JESD36 (2.7 V to 3.6 V ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115B exceeds 200 V CDM JESD22-C101E exceeds 1000 V Specified from−40 °C to +85 °C and −40 °C to +125 °C |
| 描述与应用 | 四路2输入与非门，开漏;特性 5 V容限输入与5 V逻辑接口 从1.2 V至5.5 V的宽电源电压范围 CMOS低功耗 直接接口TTL水平 开漏输出 符合JEDEC标准： JESD8-7A（1.65 V至1.95 V JESD8-5A（2.3 V到2.7 V JESD8-C/JESD36（2.7 V至3.6 V ESD保护： HBM JESD22-A114F超过2000 V MM JESD22-A115B超过200 V CDM JESD22-C101E超过1000 V 指定-40°C至+85°C和-40°C至+125°C |
